Code: Select all
PROCEDURE Bit (op: INTEGER);
VAR reg, base, inx, d: INTEGER; scale, mode: SHORTINT; disp: INTEGER;
BEGIN
w := 1;
ModRm(mode, reg, base, inx, scale, disp);
IF op = 0A3H THEN
WriteOp("bt");
ELSIF op = 0ABH THEN
WriteOp("bts");
ELSIF op = 0B3H THEN
WriteOp("btr");
ELSIF op = 0BBH THEN
WriteOp("btc");
ELSIF op = 0BCH THEN
WriteOp("bsf");
ELSE(* 0BDH *)
WriteOp("bsr");
END;
IF mode = Reg THEN
d:=1; IF (op = 0BCH) OR (op = 0BDH) THEN d:=0 END;
WriteRM(Reg, d, base, reg, none, 0, 0, 0, FALSE)
ELSE
d:=0; IF (op = 0BCH) OR (op = 0BDH) THEN d:=1 END;
WriteRM(mode, d, reg, base, inx, scale, disp, 0, FALSE)
END
END Bit;
Code: Select all
MODULE TestSystemBit;
IMPORT Log := StdLog, S := SYSTEM;
(*
IF op = 0A3H THEN
WriteOp("bt");
ELSIF op = 0ABH THEN
WriteOp("bts");
ELSIF op = 0B3H THEN
WriteOp("btr");
ELSIF op = 0BBH THEN
WriteOp("btc");
ELSIF op = 0BCH THEN
WriteOp("bsf");
ELSE
WriteOp("bsr");
END;
*)
(* bt *)
PROCEDURE [code] bt_regimm()
0FH, 0BAH, 0E0H, 03H; (* BT EAX, 3 *)
PROCEDURE [code] bt_memimm()
0FH, 0BAH, 020H, 03H; (* BT DWORD[EAX], 3*)
PROCEDURE [code] bt_regreg()
0FH, 0A3H, 0D0H; (*BT EAX, EDX*)
PROCEDURE [code] bt_memreg()
0FH, 0A3H, 010H; (*BT [EAX], EDX *)
PROCEDURE bt();
BEGIN
bt_regimm;
bt_memimm;
bt_regreg;
bt_memreg
END bt;
(* bts*)
PROCEDURE [code] bts_regimm()
0FH, 0BAH, 0E8H, 03H; (* BTS EAX, 3 *)
PROCEDURE [code] bts_memimm()
0FH, 0BAH, 028H, 03H; (* BTS [EAX], 3*)
PROCEDURE [code] bts_regreg()
0FH, 0ABH, 0D0H; (*BTS EAX, EDX*)
PROCEDURE [code] bts_memreg()
0FH, 0ABH, 010H; (*BTS [EAX], EDX *)
PROCEDURE bts();
BEGIN
bts_regimm;
bts_memimm;
bts_regreg;
bts_memreg
END bts;
(* btr*)
PROCEDURE [code] btr_regimm()
0FH, 0BAH, 0F0H, 03H; (* BTR EAX, 3 *)
PROCEDURE [code] btr_memimm()
0FH, 0BAH, 030H, 03H; (* BTR [EAX], 3*)
PROCEDURE [code] btr_regreg()
0FH, 0B3H, 0D0H; (*BTR EAX, EDX*)
PROCEDURE [code] btr_memreg()
0FH, 0B3H, 010H; (*BTR [EAX], EDX *)
PROCEDURE btr();
BEGIN
btr_regimm;
btr_memimm;
btr_regreg;
btr_memreg
END btr;
(* btc*)
PROCEDURE [code] btc_regimm()
0FH, 0BAH, 0F8H, 03H; (* BTC EAX, 3 *)
PROCEDURE [code] btc_memimm()
0FH, 0BAH, 038H, 03H; (* BTC DWORD[EAX], 3*)
PROCEDURE [code] btc_regreg()
0FH, 0BBH, 0D0H; (*BTC EAX, EDX*)
PROCEDURE [code] btc_memreg()
0FH, 0BBH, 010H; (*BTC [EAX], EDX *)
PROCEDURE btc();
BEGIN
btc_regimm;
btc_memimm;
btc_regreg;
btc_memreg
END btc;
(* bsf*)
PROCEDURE [code] bsf_regreg()
0FH, 0BCH, 0C2H; (*BSF EAX, EDX*)
PROCEDURE [code] bsf_regmem()
0FH, 0BCH, 02H; (*BSF EAX, [EDX] *)
PROCEDURE bsf();
BEGIN
bsf_regreg;
bsf_regmem
END bsf;
(* bsr*)
PROCEDURE [code] bsr_regreg()
0FH, 0BDH, 0C2H; (*BSR EAX, EDX*)
PROCEDURE [code] bsr_regmem()
0FH, 0BDH, 02H; (*BSR EAX, [EDX] *)
PROCEDURE bsr();
BEGIN
bsr_regreg;
bsr_regmem
END bsr;
PROCEDURE Do();
VAR b: BOOLEAN; x, y: INTEGER;
BEGIN
//b := S.BIT(x, 31); (* ok *)
//b := S.BIT(x, 200); (*wrong here *)
b := S.BIT(x, y); (* err *)
END Do;
END TestSystemBit.
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